← back to legend
Physical / electrical concepts

Clearance

The minimum gap between copper of different nets; set by the fab (0.1 to 0.15 mm on our boards).

How it looks

Real geometry: CORE3588 copper, drawn from our board file (2D plan view)
121 mm
Top copper, 8 x 6 mm near the right-hand power supply. The mid-grey sheet is the ground pour; light grey is copper of other nets (and the ground pads). Each black outline is clearance kept on purpose.
Real image: CORE3588, rendered by KiCad from our board file
1 mm
The same patch as the fab would make it (KiCad 3D render). Under the green mask the copper looks olive; the thin darker-green outlines are the clearance gaps.

How it works

TWO NETS ON THE SAME LAYER, SEEN FROM ABOVEnet 3V3net GND0.2 mm or more: legalDRC error: 0.05 mm apartgrey sheet = ground pour; it stops 0.2 mm short of the 3V3 track by itselfground via to other net: 0.15 mmtrack to track: 0.2 mma local rule, inside the fab's stated 0.15 to 0.20 mm range

Where it fits

Clearance is the gap between nets; the capability table of the fab sets how small it may be, and DRC checks it on every track, pad, via and pour.

Every net class carries its own clearance; on CORE3588 all classes use 0.2 mm, a little more than the 0.1 to 0.15 mm the fab could make, which leaves margin. A short circuit is what clearance prevents.

← back to legend